59 lines
1.1 KiB
Verilog
59 lines
1.1 KiB
Verilog
module mlib2
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// Parse a horizontal rule element
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fn (mut p Parser) parse_horizontal_rule() ?&MarkdownElement {
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start_pos := p.pos
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start_line := p.line
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start_column := p.column
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// Check for at least 3 of the same character (-, *, _)
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char := p.text[p.pos]
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if char != `-` && char != `*` && char != `_` {
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p.pos = start_pos
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p.line = start_line
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p.column = start_column
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return p.parse_paragraph()
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}
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mut count := 0
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for p.pos < p.text.len && p.text[p.pos] == char {
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count++
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p.pos++
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p.column++
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}
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// Must have at least 3 characters
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if count < 3 {
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p.pos = start_pos
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p.line = start_line
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p.column = start_column
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return p.parse_paragraph()
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}
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// Skip whitespace
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p.skip_whitespace()
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// Must be at end of line
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if p.pos < p.text.len && p.text[p.pos] != `\n` {
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p.pos = start_pos
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p.line = start_line
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p.column = start_column
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return p.parse_paragraph()
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}
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// Skip the newline
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if p.pos < p.text.len && p.text[p.pos] == `\n` {
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p.pos++
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p.line++
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p.column = 1
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}
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// Create the horizontal rule element
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return &MarkdownElement{
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typ: .horizontal_rule
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content: ''
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line_number: start_line
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column: start_column
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}
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}
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